ECEE 276/276L

Embedded Systems

Embedded Systems Laboratory

Fall 2006

Instructor:  G. Karsai

gabor.karsai@vanderbilt.edu

Terrace Place/FGH

Hours: MWF 10:00-11:00 or by appointment

 

TA: Chris Costello

Christopher.j.costello@vanderbilt.edu

Office: fgh 302

Office Hours: MW 11:00 -12:00

 

TA: Steven Welch

steven.w.welch@vanderbilt.edu

Hours: TBA

 

Lecture:  MWF 9:10-10:00AM in FGH 110

Lab: Per schedule in FGH 208

 

Course URL:

http://eecs.vanderbilt.edu/Courses/ee276/

 

 

 

Text:

Real-time Systems Design and Analysis (3rd Edition) by Phillip Laplante, Wiley-Interscience, 2004. ISBN 0-471-22855-9.

 

Topics and tentative schedule:

This is an advanced design course on embedded microcontroller applications in general, with focus on hardware, software, and systems issues.  The course consists of lectures and a laboratory. As part of the laboratory the students are expected to participate in a non-trivial design project, which results in a functioning prototype application. The tentative schedule below lists the lecture materials, as well as the structured laboratory exercises.

 

·         Intro, system and real-time concepts

·         Events and determinism, CPU utilization, design issues, history

 

·         Refresh of basic HW concepts, HW interfacing

·         HC12 overview: addressing modes, instructions,

·         HC12 overview: interface devices. ICE/LAN debugging tools

 

·         Review of memory types, I/O techniques                                                        -- LAB:ICE/LAN

·         Performance enhancements, other devices, non von-Neumann machines

·         Interrupts: basics, shared data problem, latency                                            

 

·         Embedded SW architectures: round-robin, function-queue scheduling   -- LAB: LAN/ICE

·         RTOS basics: process scheduling

·         Simple task synchronization: semaphores and shared data                            

 

·         Task communication: queues, mailboxes, pipes                                             -- LAB: UCOS ON PC

·         Timer functions and events                                                                           

·         RTOS: memory management, interrupt handling                                             -- PROPOSALS DUE    

 

·         RTOS features review                                                                                   -- LAB: UCOS ON UC

·         Requirements: problem, types, real-time                                                       

·         Midterm #1

 

·         Preliminary Design Review                                                                            -- LAB: SEMAPHORES

·         Techniques: FSM-s, Statecharts

·         Techniques: Petri nets                                                                                  -- PARTS LIST DUE

 

·         Techniques: OO/UML                                                                                   -- LAB: MSG QUEUES

·         Documentation  & case study

·         Design: software properties, engineering principles                                         

                                   

·         Break                                                                                                          -- LAB: TIMER/EVENT

·         Procedural design techniques                                                                      

·         Object-oriented design techniques                                                                

 

·         Case study for a real-time system                                                                 -- LAB: SMALL DESIGN

·         Requirements and design techniques review

·         Midterm #2                                                                                     

 

·         Real-time programming languages: basics    

·         Issues in procedural and object-oriented languages                                        

·         Critical design review

                       

·         Survey: Ada 95, C/C++, C#                                                                           -- LAB: PRACTICAL

·         Survey: Java/RTJ, Occam2 - Coding standards

·         Performance analysis/optimization: theory                                                    

 

·         Analysis with queuing theory                                                                        

·         Performance optimizations

·         Compiler techniques, memory utilization                                                        -- ALL LABS DUE

 

·         Engineering issues: metrics

·         Fault tolerance and system integration

·         Systems Engineering

 

·         Project presentations

·         Course wrap-up

 

Since the course involves and tightly coupled to intensive lab work, the order and pace of the topics covered will be tailored to parallel progress in the lab.

 

Prerequisites:

EECE 218 (Microprocessors I) or equivalent, knowledge of the C programming language.

 

Course ground rules:

The course consists of two parts: lectures and laboratory, with separate grades. This is a practical course, oriented toward the successful completion and presentation of functioning projects. It will require a great deal of independent work, but you CANNOT pass the course on the basis of the strength of your project alone; similarly, good classroom performance will not get you a good grade if your project is a dud.  You will be responsible for knowing ALL material delivered in the lecture and structured labs, and some of this material is not included in the textbook. If you anticipate missing classes due to trips, plan to obtain notes from someone else and review them as soon as you return.  Engineering school policy specifies that class attendance is required.

 

Although Dr. Karsai is responsible for the course overall, this responsibility includes a lot of unseen details with respect to the operation of the lab. The TA is the primary “interface” for lab-related matters. Thus, any communication outside the classroom regarding scheduled lab or project matters must be made first with your lab TA.

 

Since this course is primarily lab-oriented, there will be no separate homework. However, weekly, closed-book quizzes will be given to assess progress. Consider these quizzes and the labs as your ongoing homework assignment as keeping current in the course and structured labs. You may find that with all of the procedures in the lab, your first exercises will require more time than the standard laboratory period to complete.  Bear in mind that it is extremely difficult to catch up if you get behind, and this is the main reason for students doing poorly in the course.  There is a penalty for all lab write-ups that are turned in late (except by prior consent of the lab instructor); this is to encourage you to stay current.  Engineering school policy requires completion of every class assignment in order to receive a passing grade.

 

The project component of the course involves significant amount planning, design, implementation, testing, and documentation work. We are going to follow standard industry practice, according to the following phases:

1.       Project groups prepare a project proposal, which outlines what they want to do.

2.       Based on feedback from the instructor, the groups present their proposal in a Preliminary Design Review (PDR) to the class, for discussion and feedback.

3.       After revising their design, project groups prepare a parts list and submit it to the TA, and start working on the detailed design and prototyping/experimentation activities of the project.

4.       The groups will present their final design in a Critical Design Review (CDR) to the class for discussion and feedback.

5.       After receiving feedback, the groups will freeze the design and focus on implementation and testing.

6.       At the end of the semester, the groups will present their final design and implementation, and demonstrate it to the instructor.

7.       The groups prepare detailed user and technical documentation for their project.

8.       The group members prepare a confidential evaluation of their teammates, this forms part of the evaluation of the work of the individuals.

The project proposal, the parts lists, presentations for the PDR and CDR must be submitted via email to the instructor and the TA by the end of the day as specified in the deadline. Final project reports must be prepared and submitted on a CD-ROM to the instructor. Confidential evaluations must be submitted at teh same time as the final reports, via email to the instructor.

 

Dates Graven in Stone:

 

·         First lab week:                                 Sep 4

·         Project proposals due:                      Sep 22

·         Midterm #1:                                     Sep 29

·         Preliminary design review:                 Oct 2

·         Parts list due:                                  Oct 6

·         Midterm #2:                                     Oct 27

·         Critical design review:                       Nov 3

·         Lab practical week:                          Nov 6

·         All labs due:                                    Nov 17

·         Project reports start:                        Dec 4   

·         Projects demos DUE:                       Dec 7, 5PM: No excuses, no exceptions.

·         Final:                                              Dec 12, 9AM.

·         Project documentation DUE: Dec 15, 5PM.

 

Exam dates are graven in stone.  If possible, plan your plant trips around exams; makeup exams will be given only for medical excuses. Please note there are two (2) midterms and one (1) lab practical exam, with equal weight. On the lab practical you will be asked to solve a lab exercise problem alone.

 

Grading:

Grades will be determined on the following basis:

 

Lecture:

Lab:

Midterms (2):                             2 * 30%

Lab book:                                  20%

Quizzes:                                      10%

Lab practical exam:                    20%

Final Exam:                               30%

Project performance:                  60%

                                                           

Assignment of letter grades will be relative to your performance compared with the entire class.  All midterms and the final examination are mandatory.  Please understand that grades are earned, not negotiated.  If you are concerned about getting a good grade in the class, the time to start doing something about it is the first day of class.  If you come to every class, do your lab work independently, and employ study habits that keep you current with the material, you will do well in the course.

 

Labs:

Experience in making embedded microprocessor systems to work is the primary goal of this course, so laboratory work will receive a strong emphasis. There will also be a mandatory lab practical examination that will receive a significant weight, and where students will perform a lab exercise alone.  You should therefore expect that the labs will take a long time and even though you will have a lab partner, you should plan to work independently as much as possible. If you prepare for the labs on your own and execute them without significant help from your partner, you will breeze through the lab practical.  Be aware that final grades could drop as much as one letter due to poor performance on the lab practical.

 

All of the eight scheduled labs are structured and mandatory.  The remaining time should be spent on development of your project. The plan for the structured labs is as follows:

 

Topic

On the week of

·        The HP1650A Logic Analyzer/6811 in-circuit emulation

Sep 4

·        6811 in-circuit emulation/ The HP1650A Logic Analyzer

Sep 11

·        uCOS on a PC - Real-time concepts

Sep 18

·        uCOS on the HC12 - Using an RTOS on a uC

Sep 25

·        Semaphores for synchronization

Oct 2

·        Message queues and mailboxes

Oct  9

·        Times and events

Oct 16

·        Small design example

Oct 23

 

Prior to the first lab, you should review the procedures that you used for the 68HC11 labs.  You will continue to use PC-s for editing and assembly of your code. The procedures require that you MUST be familiar with (plain) text editing, and downloading.

 

PC-s are available in the lab, but you may also (as before) edit and test-assemble your code on any available PC off site.  If you do not have an ASCII text editor (Note: Word processors, such as MSWord, are not really suitable for this purpose), you can use Notepad from Windows.

 

The lab machines will have the uCOS RTOS and the compilers installed. The uCOS package can be used freely for educational use but for commercial use you need a license. You will need to use the GNU-HC11/2 tools (EmbeddedGnu, etc.) to compile your code on your own computer.

 

You should have your programs written and entered before you come to lab.  Otherwise you will be denied entry to the lab.  This is because you will otherwise find it extremely difficult to finish the exercise in the allowed period.  Completed write-ups with corrected code are due at the NEXT weekly lab meeting.  Late write-ups will only be accepted with prior consent of the lab instructor, and (except for medical excuses) will be penalized a minimum of 10% (i.e., maximum possible score of 90%).  If you have a conflict or planned trip you must make PRIOR arrangements with your lab T.A.  A week's grace period will be extended beyond the end of the structured labs to make up any work you have missed.  Lab reports will NOT be accepted after this date; depending on circumstances, labs missing at this time are considered grounds for failure in the course.

 

The interval after the structured labs are finished is to give you an opportunity to work on your projects with the aid of the lab TA.  Your regular lab meeting is the ONLY time you can be assured of any assistance.  You cannot expect to get help outside of your lab period unless you have made an appointment with your TA or assigned instructor.  Do not blow these unstructured labs off and then expect to get help in the last week before projects are due.

 

Projects:

The primary goal of this course is to give the student hands-on experience in the conception, execution, completion and documentation of a standalone functional system based on the hardware and software capabilities of common microprocessors. Please see the project plan above for the details how the projects will be conducted.

 

The projects may require additional work to learn about the details of the microcontrollers and peripheral interface devices you plan to use in the project. It is your responsibility to find the appropriate documentation for these on the web, study and use them as needed. The microcontroller boards used in the project also have extensive documentation and example code, and you may need to study these for your project.

 

Experience shows that projects need at least two people participating to be successful. Unless you are a very experienced graduate student,

PROJECT TEAMS MUST CONSIST OF >=2 PEOPLE.

It is assumed that you will have adequate time to complete, debug and document your project within the semester.  As a consequence your project grade will be based on the progress you have made by the project deadline, whether your project is working or not.

THERE WILL BE NO "INCOMPLETE" GRADES GIVEN IN THIS COURSE.

You are therefore advised to tackle the more challenging aspects of your project as soon as possible.

 

Graduate students

Graduate students taking the course for graduate credit will have the following additional requirements:

1.       For the lecture part they will prepare a review paper of >5 pages on an embedded system topic, selected from the bibliography in the textbook.  The topic will be selected by the graduate student, contingent upon instructor approval. The deadline for the selection is the date of Midterm #1, and the deadline for submitting the paper is the date of the Lab Practical.

2.       For the laboratory and project part, the graduate students are required to select a more complex project, and are encouraged to work individually. Project proposals will be evaluated and accepted by the instructor.

 

ABET Requirements

The course (lectures and laboratory) was designed to address the following ABET Required Outcomes:

(b) an ability to design and conduct experiments, as well as to analyze and interpret data

(k) an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice,

and the following ABET Program Criteria:

The program must demonstrate that graduates have: ... (2) knowledge of ... engineering sciences necessary to analyze and design... (b) software, and (c) systems containing hardware and software components, as appropriate to program objectives.

The lectures provide the engineering science materials for the design and analysis of (embedded) software and systems (containing both hardware and software). The laboratory exercises require the design and execution of experiments, and the analysis and interpretation of data observed. The project component provides training for obtaining experience in the use of techniques, skills, and modern engineering tools necessary for engineering practice.

 

Safety

Violations of safety guidelines as given by the lab instructor will result in dismissal from the lab with a failing grade. No warnings are issued!

 

Students with disabilities

Vanderbilt is committed to equal opportunity for students with disabilities. If you have a physical or learning disability, you should ask the Opportunity Development Center to assist you in identifying yourself to the instructor as having a disability, so that appropriate accommodation may be provided. Absent notification, the instructor will assume that you have no disabilities and seek no accommodation.

 

Emergency evacuation

Regarding safety and emergency evacuation issues the students should follow the related guidelines of the School of Engineering. In the event of a fire or other emergency, the occupants of this class should collect coats and personal belongings and leave the building.

VANDERBILT UNIVERSITY POLICY FORBIDS REENTRY TO A BUILDING IN WHICH AN ALARM HAS OCCURED WITHOUT AUTHORIZATION BY VANDERBILT SECURITY.

If, in consequence of a disability, you anticipate the need for assistance, please discuss that need with the instructor.

 

Honor system requirement

All work submitted in this course falls under principles and regulations of the Honor System of Vanderbilt University.